Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Question about building a prbs generator, using a lfsr, schematic entry

Hi, I want to generate a random bit sequence, using a schematic entry in quartus. For example and to test, i tried a 4bit prbs. (see the screenshot attached) I used a LFSR, built it with...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Thank you Dave,

I already visited this links to get some information.

Is it possible to generate a block or an IP, using VHDL code?

So i could use the generated block in the schematic.

regards