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HalmonCelman's avatar
HalmonCelman
Icon for New Contributor rankNew Contributor
3 years ago
Solved

Questa always return X state on output

Hi, I'm on CentOS 7 and I've installed Quartus Prime Lite 21.1 I'm trying to run simple simulation in Questa. my *.bdf file:  my *.vwf file  when i'm running Simulation>Run Fu...
  • RichardT_altera's avatar
    RichardT_altera
    3 years ago

    I think it might be the Questa tool issue. I was using Modelsim previously.

    Could you try to use Modelsim Intel FPGA edition instead of Questa and see if the issue persists?


    Best Regards,

    Richard Tan


RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
3 years ago

Hi,

I am able to simulate the design successfully at my side.

My guess is most likely the NOT gate is not connected to the input and output port.

Could you move the NOT gate around to see if the line still connected? You may check the RTL viewer to confirm.


Best Regards,

Richard Tan


p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 9/10 survey.


HalmonCelman's avatar
HalmonCelman
Icon for New Contributor rankNew Contributor
3 years ago

Hi,

Thank you for your response,

I tried to move gate and wires are still connected, also I have run RTL viewer, result:

HalmonCelman