Forum Discussion
quartus22.4 fpll unlock
- 3 years ago
Hi King22,
Thanks for the project file. I am able to reproduce the crash so I will make a report to engineering to fix it in future release.
As for the fpll can't unlock in Quartus 22.4, can you continue the communication in another forum that was posted by you?
I believe that was supported by another AE in that post.
I will close this one. Is it okay for you?
Regards,
Aqid
Never mind, I managed to open the file.
I tried to compile the design in Quartus 21.1 and got the compilation error. Can you explained how it crash from your side? If this is a bug, I can report it to the engineering team.
For Quartus 22.4, so far, I compiled the design successfully. Will tried to look on the issue with the transceiver fpll can't lock. If you can explain the steps you do maybe it can help me to further investigate. It will be very appreciated.
Regards,
Aqid
Hi Aqid
1. I can't find any *.qar in my project
2. I can finish the attaced project with Q21.1 (tranceiver is 4 channel) , Q21.1 will crash on my side when I use the tranceiver over than 4 channel , I had report the situation already and got a reply , Intel suggess me to change the Quartus to 22.4 , so my company upgrade it .
3. About how to check the lock status of FPLL , I just use a signal tap file attached in my project , the file name is "stp1.stp" ,
the signal name in stp is " isp_fpga_clk_locked " . In Q21 , this signal will be "1" , and in Q22 result , this signal always "0"
Thanks