Quartus simulator timing warnings

I would have thought that using only one clock might help things. If you've still got problems then you can try using multicycle holds to tell Quartus that the clock enables don't change every clock cycle and so on those paths the clock frequency is effectively lower.

Check the help on that - I've not done it for a while.

Have you set the required clock frequency to your 500kHz? If you only want the device to run that fast then there's precious little point in forcing Quartus to make it work faster.

Also look at the paths that cause the biggest problem - i.e. the longest delay between registers. If you've got a big lump of combinatorial logic then try pipelining it a bit.