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Altera_Forum
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10 years ago

Quartus Router Congestion

Hello all, I have a Cyclone V A9 device (300k LEs) and a big design that fit it 95% ALM 12% Memory bits 37% DSP. 14% of ALM are unavailable due to LAB input limits and wide-signals conflicts so...
Altera_Forum's avatar
Altera_Forum
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10 years ago

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Dividers (fixed point) are always 1/X where X change so no tricks..

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Maybe consider using newton-raphson dividers (https://en.wikipedia.org/wiki/division_algorithm). This could have those unused multipliers doing useful work.