New Contributor
Super ContributorHi,
Check this link https://www.doulos.com/knowhow/systemverilog/systemverilog-tutorials/systemverilog-classes-tutorial/ and this link https://verificationguide.com/systemverilog/systemverilog-class/, SystemVerilog introduces classes as the foundation of the testbench automation language. That's why classes can be used in simulator but not in compiler tool like Quartus.
Thanks,
Best Regards,
Sheng
New ContributorThank you!
Dose it mean that I have to change my code if I want to implement the algoritm to the FPGA? If yes, can recursive functions be used in the compiler tools?
Super Contributor
