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satoshio
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6 years ago

Quartus Prime Pro: Internal Error: Sub-system: BSYN, File: /quartus/fitter/bsyn/dup/bsyn_qdup.cpp, Line: 1300

I encountered following internal error. ​ ----​ Problem Details Error: Internal Error: Sub-system: BSYN, File: /quartus/fitter/bsyn/dup/bsyn_qdup.cpp, Line: 1300 parent_candidate.m_rejected_str...
satoshio's avatar
satoshio
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6 years ago

Hi.

I'm using Stratix10.

Sorry, I can't provide design files.

Following is summary of the design.

Family : Stratix 10

Device : 1SX280LN3F43E2VG

Timing Models : Final

Logic utilization (in ALMs) : 435,765 / 933,120 ( 47 % )

Total dedicated logic registers : 515140

Total pins : 175 / 912 ( 19 % )

Total block memory bits : 9,732,800 / 240,046,080 ( 4 % )

Total RAM Blocks : 1,135 / 11,721 ( 10 % )

Total DSP Blocks : 5,169 / 5,760 ( 90 % )

Total DIB Channels : 0 / 75 ( 0 % )

Total HSSI RX channels : 0 / 48 ( 0 % )

Total HSSI TX channels : 0 / 48 ( 0 % )

Total PLLs : 3 / 88 ( 3 % )