Forum Discussion
sstrell
Super Contributor
2 years agoWithout showing the design or more details on what you've tried and what your expected results are, it's hard to help. Provide more info if you can.
- pharez2 years ago
New Contributor
The design i tried was a simple AND gate using VHDL i set the simulator all the options setting but when i create a new wafeform simulation and get all the nodes in and try to simulate, the output continues to remain XXXXX