Anand,
Sorry to late about reply.
My PC RAM size is 128GB.
I think that it is enough RAM.
If you have enough RAM.
1. Can you share project details (Like Device, IP used and its settings )?
- In my project, I use ArriaV(5AGXB7), CycloneV(5CEA7).
- Using IPs are clk_pll, fifo, bram, Transceiver Reconfiguration Controller, DDIO, Nios
- Compiler Settings: Optimization mode: Balanced (Normal flow)
- Compilation Process Settings: Parallel compilation: Use all available processors
2. Check with simple design, If you are facing same issues.
- When I was facing same issues, I tried to compile simple design. Simple design was compiled well. Also similar design was compiled well too. Similar design is modified design about minor.
3. If possible can share the design?
- Sorry, I'm working to project in company. So I cannot share my design.
I suspected to ompatibility problem with Quartus Prime Standard and WIndows 10. But I cannot find anything from googling. I need help from Altera Forum.
Thank you for your help.