Forum Discussion
Hi Lavi,
I found a similar issue to yours here, you may refer to the URL below:
Please let me know if your issue persists.
Regards,
Nurina
Sorry for the delay. I only have access to the computer in question every few days.
The suggestions made in that thread you linked did not work. I tried putting the path in only Modelsim, in only Modelsim-Altera, and in both.
All three gave me the exact same error when running a functional simulation on the waveform:
Modelsim executable not found in C:/intelFPGA_lite/20.1/quartus/common/tcl/internal/nativelink
Error.
The folder in question has modelsim.tcl
- DrZ4 years ago
New Contributor
In case it might help, here is the entire output given when I run the functional simulation:
Determining the location of the ModelSim executable...
Using: C:\intelFPGA_lite\20.1\quartus\common\tcl\internal\nativelink\
To specify a ModelSim executable directory, select: Tools -> Options -> EDA Tool Options
Note: if both ModelSim-Altera and ModelSim executables are available, ModelSim-Altera will be used.**** Generating the ModelSim Testbench ****
quartus_eda --gen_testbench --tool=modelsim_oem --format=verilog --write_settings_files=off andxor -c andxor --vector_source="H:/2021 Spring/ENGR 2206/Quartus/andxor/Waveform.vwf" --testbench_file="H:/2021 Spring/ENGR 2206/Quartus/andxor/simulation/qsim/Waveform.vwf.vt"
Info: *******************************************************************
Info: Running Quartus Prime EDA Netlist Writer
Info: Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
Info: Copyright (C) 2020 Intel Corporation. All rights reserved.
Info: Your use of Intel Corporation's design tools, logic functions
Info: and other software and tools, and any partner logic
Info: functions, and any output files from any of the foregoing
Info: (including device programming or simulation files), and any
Info: associated documentation or information are expressly subject
Info: to the terms and conditions of the Intel Program License
Info: Subscription Agreement, the Intel Quartus Prime License Agreement,
Info: the Intel FPGA IP License Agreement, or other applicable license
Info: agreement, including, without limitation, that your use is for
Info: the sole purpose of programming logic devices manufactured by
Info: Intel and sold by Intel or its authorized distributors. Please
Info: refer to the applicable agreement for further details, at
Info: https://fpgasoftware.intel.com/eula.
Info: Processing started: Tue Mar 23 16:59:21 2021
Info: Command: quartus_eda --gen_testbench --tool=modelsim_oem --format=verilog --write_settings_files=off andxor -c andxor --vector_source="H:/2021 Spring/ENGR 2206/Quartus/andxor/Waveform.vwf" --testbench_file="H:/2021 Spring/ENGR 2206/Quartus/andxor/simulation/qsim/Waveform.vwf.vt"
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.Completed successfully.
Completed successfully.
**** Generating the functional simulation netlist ****
quartus_eda --write_settings_files=off --simulation --functional=on --flatten_buses=off --tool=modelsim_oem --format=verilog --output_directory="H:/2021 Spring/ENGR 2206/Quartus/andxor/simulation/qsim/" andxor -c andxor
Info: *******************************************************************
Info: Running Quartus Prime EDA Netlist Writer
Info: Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
Info: Copyright (C) 2020 Intel Corporation. All rights reserved.
Info: Your use of Intel Corporation's design tools, logic functions
Info: and other software and tools, and any partner logic
Info: functions, and any output files from any of the foregoing
Info: (including device programming or simulation files), and any
Info: associated documentation or information are expressly subject
Info: to the terms and conditions of the Intel Program License
Info: Subscription Agreement, the Intel Quartus Prime License Agreement,
Info: the Intel FPGA IP License Agreement, or other applicable license
Info: agreement, including, without limitation, that your use is for
Info: the sole purpose of programming logic devices manufactured by
Info: Intel and sold by Intel or its authorized distributors. Please
Info: refer to the applicable agreement for further details, at
Info: https://fpgasoftware.intel.com/eula.
Info: Processing started: Tue Mar 23 16:59:23 2021
Info: Command: quartus_eda --write_settings_files=off --simulation=on --functional=on --flatten_buses=off --tool=modelsim_oem --format=verilog --output_directory="H:/2021 Spring/ENGR 2206/Quartus/andxor/simulation/qsim/" andxor -c andxor
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
Info (204019): Generated file andxor.vo in folder "H:/2021 Spring/ENGR 2206/Quartus/andxor/simulation/qsim//" for EDA simulation tool
Info: Quartus Prime EDA Netlist Writer was successful. 0 errors, 1 warning
Info: Peak virtual memory: 4725 megabytes
Info: Processing ended: Tue Mar 23 16:59:24 2021
Info: Elapsed time: 00:00:01
Info: Total CPU time (on all processors): 00:00:01Completed successfully.
**** Generating the ModelSim .do script ****
H:/2021 Spring/ENGR 2206/Quartus/andxor/simulation/qsim/andxor.do generated.
Completed successfully.
ModelSim executable not found in C:/intelFPGA_lite/20.1/quartus/common/tcl/internal/nativelink/
Error.I also tried putting the project in a folder without any spaces, but got the same result.