Forum Discussion

yy1's avatar
yy1
Icon for New Contributor rankNew Contributor
2 years ago

quartus prime 18.1 quit unexpectedly (when lvds serdes modify tx outclock phase to 45)

Software: quartus prime 18.1 FPGA Device: 10AX027H4F34I3SG The error report as below How can I fix this error? Problem Details Error: Internal Error: Sub-system: CUT, File: /quartus/db/cut...
AqidAyman_Altera's avatar
AqidAyman_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hello,


Thank you for reaching out Intel FPGA Community.


Is it possible for you to share the design file (.qar file) with us? You can go to Project>Archive Project to generate the .qar file. We need it to identify if this is related to any settings that have been done that may lead to the error and to duplicate the error from our side.


You can share privately by email if you need privacy. I will initiate the email.


Regards,

Aqid