Quartus P-Tile PCIe IP config crashes

Allow me to clarify my upthread claim that Intel isn't using the PCIe Avalon-MM IP core in their own demo design. If you open the included demo design, you'll see that there's a "generic component" implemented, that happens to have its name assigned to that of the busted IP Core. Maybe Intel was hoping nobody would notice that they're not using their own IP ...

The generic core has a Big List o' Parameters ... nominally 2000 of them ... unrolled as a flat-file list. The API we are looking for is the one that identifies and describes every one of these parameters such that we, the community, may community-support ourselves.