Quartus' own Single Port RAM template infers Dual Port RAM with pass-through logic

Quartus II does not currently infer a RAM if the read address registers have a clock enable, so you need to instantiate your RAM through the MegaWizard. There are other cases where you must instantiate rather than infer, e.g. if you require byte enables. On the plus side, I'm told that Quartus II 8.0 will infer RAMs with clock enables on the read address registers.