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Altera_Forum
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14 years ago

Quartus II Warning:The following clock transfers have no clock uncertainty assignment

Hi all,

in my design project, I have 2 clock in input: 'ref_clk_i' and 'clock_i'.

I set up these clocks with tickle commands

create_clock -period 10 [get_ports ref_clk_i]

create_clock -period 1 [get_ports clk_i]

and after that I clicked 'Update the timing netlist', but this is the warning message I received:

warning: the following clock transfers have no clock uncertainty assignment

warning: from ref_clk_i (rise) to ref_clk_i (rise) (setup and hold)

warning: from clk_i (rise) to ref_clk_i (rise) (setup and hold)

warning: from clk_i (fall) to ref_clk_i (rise) (setup and hold)

Where am I going wrong?

Thanks to all.

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    --- Quote Start ---

    Hi all,

    in my design project, I have 2 clock in input: 'ref_clk_i' and 'clock_i'.

    I set up these clocks with tickle commands

    create_clock -period 10 [get_ports ref_clk_i]

    create_clock -period 1 [get_ports clk_i]

    and after that I clicked 'Update the timing netlist', but this is the warning message I received:

    warning: the following clock transfers have no clock uncertainty assignment

    warning: from ref_clk_i (rise) to ref_clk_i (rise) (setup and hold)

    warning: from clk_i (rise) to ref_clk_i (rise) (setup and hold)

    warning: from clk_i (fall) to ref_clk_i (rise) (setup and hold)

    Where am I going wrong?

    Thanks to all.

    --- Quote End ---

    Hi,

    nothing goes wrong. You can use the uncertainty assignment to define the "jitter" of your clock, means that your clock is not absolute stable. The assignment is taken into account

    for timing analysis. If your clock is stable you don't need to set this assignment.

    Kind regards

    GPK