--- Quote Start ---
Thank you, Dave for your answer, but it seems very specific solution to D0 board.
--- Quote End ---
The project is, but the use of Tcl scripts is generic. Take a look at the scripts and understand how they work.
--- Quote Start ---
All I need is one command to add VHDL top file and other VHDL files to the project.
--- Quote End ---
No, you don't. An FPGA project involves more than just the HDL code. You need Tcl commands to add VHDL files, to add SDC constraints files, to select the device type, etc etc.
--- Quote Start ---
I created a project using quartus_sh --tcl_eval project_new <name>, I want to add VHDL file to that <name> this is my problem which command should I use??
--- Quote End ---
Read the synthesis script (scripts/synth.tcl) and you will see the code to create a new project, to select the device, to add files, etc.
Cheers,
Dave
Honored Contributor
