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CADAMS
New Contributor
4 years agoQuartus II Synthesis - System Memory Issues for Large Stratix 10 Design
Hello, I have a Stratix 10 design that is based around an ip core generated using Intel's HLS. The core does some simple floating point operations and by itself uses very few resources (1 DSP, a f...
BoonBengT_Altera
Moderator
4 years agoHi @CADAMS,
Apologies for the confusion, if I understand correctly what has been implemented is a for loop to trigger the ip core that are performing the simple floating point. If the for loop are increase to a big number, memory are overloaded.
Mind if I asked what are the value for the SOMEBIGNUMBER which is causing the issues?
As well as are you able to share how the floating-point operation are written?
Hope to hear from you soon.
Best Wishes
BB