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Altera_Forum
Honored Contributor
9 years agoQuartus ii stuck at Analysis and Synthesis
Hi all! My compilation of the VHDL project is stuck at 40% of Analysis and Synthesis status for more than 10 hours. It just freeze there, no error. The program is still running since the timi...
Altera_Forum
Honored Contributor
9 years agoCompilation in modelsim and quartus are two different things.
Modelsim just compiles your code for simulation - and will simulate your code exactly as you wrote it. Quartus has to convert your code into logic, which is should behave the same way that you write the code. Long synthesis times usually occur when you have a large ram that does not map to internal ram because your code does not match the behaviour of the ram, so Quartus has to build the ram out of logic. This will use a lot of system ram and CPU time. If you post your code, maybe we can tell you where you're going wrong.