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The best way to help is to discuss about what was asked and provide a solution or work around if possible.
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Well let's try this again.
1st question:
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1. How I can generate a VHDL instantiation template? The File->Create/Update->Create VHDL Component... does only the component declaration.
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From Quartus beginning at the edit menu:
a - Edit->Insert Template->VHDL->Constructs->Design Units->Entity. Does this menu exist in the web edition of the software and if so does it meet your needs?
In my subscription edition it creates the following:
entity <entity_name> is
generic
(
<name> : <type> := <default_value>;
...
<name> : <type> := <default_value>
);
port
(
-- Input ports
<name> : in <type>;
<name> : in <type> := <default_value>;
-- Inout ports
<name> : inout <type>;
-- Output ports
<name> : out <type>;
<name> : out <type> := <default_value>
);
end <entity_name>;
2nd Question:
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2. I created a minimal test design with two VHDL files , one of them being the top module. What I noticed is that "Analyze Current File" always analyzes both of them,no mather which one I am currently working on. Why? I did not instantiated (yet) the second module in the top entity.
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When I click on the "Analyze Current File" button on the left side of the text editor window (I normally use an external editor so this is new to me), It only analyzes the currently open file and no others. Here is the processing output in Quartus:
Info: *******************************************************************
Info: Running Quartus II Analyze Current File
Info: Version 8.0 Build 231 07/10/2008 Service Pack 1 SJ Full Version
Info: Processing started: Wed Oct 29 17:29:43 2008
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off trio_top -c trio_top --analyze_file=C:\Projects\cvs_test\trio\fpga\X2\trio_top\src\sdi\sdi_top.v
Info: Quartus II Analyze Current File was successful. 0 errors, 0 warnings
Info: Peak virtual memory: 155 megabytes
Info: Processing ended: Wed Oct 29 17:29:44 2008
Info: Elapsed time: 00:00:01
Info: Total CPU time (on all processors): 00:00:01
Can you post the output you get in the web edition?
Jake
Honored Contributor
