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Altera_Forum
Honored Contributor
10 years agoQuartus II Internal Error
Hi, I'm not very experienced with FPGAs. Can some one help me with the following problem please! I did "Analysis an Elaboration" on my design and it was successful. Then I tried "Analysis and ...
Altera_Forum
Honored Contributor
10 years ago --- Quote Start --- This is a crash - no idea what caused it. Try a newer version of quartus or raising a support ticket. --- Quote End --- Thank you. I did file a service request. But I guess it has something to do with the timing. As I was trying to do analysis and elaboration, I was getting error for my verilog.v file. Finally I resolved that problem and now I'm getting this problem. I have minimum experience with creating .sdc file.