Quartus II error: ddr2 ALTMEMPHY

--- Quote Start ---

I found the error. Some ports are declared in the qsys example as std_logic_vector(0 donwto 0) you need to define them as std_logic especially for mem_clk of the altmemddr.

--- Quote End ---

Thanks kakaboud!

Your answer fixed the problem for me - DDR2 in a QSYS system with vhdl as top level. I had to change the top level pin and the QSYS component declaration to std_logic instead of std_logic_vector(0 downto 0).

Cheers,

Greg