Quartus II ECO Fitting error when setting the D5 delay chain

I want to change the delay value of D5 delay chain for an output pad in RPE. My device is Stratix V.

After changing the setting, when I execute "check and save all netlist changed", error occurs as following:

Can anyone help me? Thanks.

Info: *******************************************************************

Info: Running Quartus II 64-Bit Fitter

Info: Version 14.1.0 Build 186 12/03/2014 SJ Full Version

Info: Processing started: Mon Jun 15 09:55:02 2015

Info: Command: quartus_fit --read_settings_files=on --write_settings_files=off ts240x -c ts240x --eco

Info: qfit2_default_script.tcl version:# 1

Info: Project = ts240x

Info: Revision = ts240x

Info (11104): Parallel Compilation has detected 8 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 4 of the 4 physical processors detected instead.

Info (21077): Low junction temperature is 0 degrees C

Info (21077): High junction temperature is 85 degrees C

Info (171003): Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time

Info (171062): ECO Fitter applying ECOs to previous post-fitting netlists

Warning (171124): Timing-Driven Compilation is disabled - timing performance will not be optimized

Error (14608): You have completed a Rapid Recompile incremental compilation. Please run the Rapid Recompile Fitter to re-iterate your Rapid Recompile incremental compilation, or run Analysis & Synthesis (quartus_map) to start a Full Compilation.

Error (11802): Can't fit design in device

Error: Quartus II 64-Bit Fitter was unsuccessful. 2 errors, 1 warning

Error: Peak virtual memory: 2560 megabytes

Error: Processing ended: Mon Jun 15 09:57:22 2015

Error: Elapsed time: 00:02:20

Error: Total CPU time (on all processors): 00:02:20

Error (293001): Quartus II ECO Fitting was unsuccessful. 4 errors, 1 warning