Quartus II Compilation Error

I am in the process of compiling the Hello World OpenCL kernal and have received the error below:

Error (12061): Can't synthesize current design -- Top partition does not contain any logic

Error: Quartus Prime Analysis & Synthesis was unsuccessful. 1 error, 0 warnings

Error: Peak virtual memory: 795 megabytes

Error: Processing ended: Tue Feb 02 22:37:49 2016

Error: Elapsed time: 00:00:13

Error: Total CPU time (on all processors): 00:00:24

Error (293001): Quartus Prime Full Compilation was unsuccessful. 3 errors, 0 warnings

I uploaded a screen shot of my Quartus II project. I am running version 15.1 and my FPGA board is the DE1 Soc Development Board from Altera.

Any help is greatly appreciated.