Quartus II Active-HDL Serial Lite Simulation

Hi,

I'm pretty new to Quartus II software and I'm hitting a few snags during the simulation process in Active-HDL of the Serial Lite core.

1) When I open Active-HDL for simulation the tool imports the serial_lite_hss.vho file, but the file calls out the stratix device instead of the arria II gx.

LIBRARY stratixiv_hssi;

USE stratixiv_hssi.stratixiv_hssi_components.all;

I have the arria II gx component selected in the Quartus II tool.

2) Is there anyway for the Quartus II software to generate .vhd files, instead of the .v and .vho files when simulating in Active-HDL?

3) Is there a demo simulating the Serial Lite core in Active-HDL available on the net?

Thanks!