Altera_Forum
Honored Contributor
Honored ContributorQuartus II 9.1 changes inference rules for altsyncram
Hi folks,
I may have found an interesting "feature" that appeared in Quartus II 9.1: a VHDL constant ROM is not inferred as an altasyncram if its size is not a power of 2. This is not the case using Quartus II 9.0 SP2. For example:library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity main_roms is
port (
addr : in unsigned(13 downto 0);
clk : in std_logic;
dout : out unsigned(7 downto 0));
end main_roms;
architecture rtl of main_roms is
type rom_array is array(0 to 12287) of unsigned(7 downto 0);
constant ROM : rom_array := (
X"00", X"00", X"00", X"00", X"00", X"00", X"00", X"00",
...
X"83", X"7f", X"5d", X"cc", X"b5", X"fc", X"17", X"17",
X"f5", X"03", X"fb", X"03", X"62", X"fa", X"59", X"ff");
begin
process (clk)
begin
if rising_edge(clk) then
dout <= ROM(TO_INTEGER(addr));
end if;
end process;
end rtl;
