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Altera_Forum's avatar
Altera_Forum
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10 years ago

Quartus filters out essential parts of state machine?

Hi, Recently faced very strange issue in my design. I have state machine, which goes through multiple steps, and at the end there is kind of "Delay" state and "SetReady" state... Problem is...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Have you provided timing specs for Timequest to do timing analysis in your design? or are there asynchronous circuits that are causing the issues? Using async circuits and latches are not recommended precisely for timing issues that cannot be caught in simulation or timing analysis.