Quartus feature request

Dear Altera,

In the next version of Quartus I would like to request support for Module-Based partial-reconfiguration of the FPGA. I.e. the ability to reconfigure a portion of the FPGA while the remainder of the design is still operational.

An external microprocessor should be able to supply the FPGA (in Passive Serial mode) with a bitstream that reconfigures a pre-determined area of the floorplan with a new configuration.

Module-based Partial Reconfiguration is applicable when communication is needed between modules. For modules that communicate with each other, a special bus macro is required to allow signals to cross over a Partial Reconfiguration boundary.

I have a (commercially sensitive) application for this and whilst this is now possible to do with Xilinx FPGAs, I prefer to do business with Altera.

However, Altera have not added this capability to Quartus yet.

Regards,

Kind Regards,

EurIng Nicholas Lee BSc(Hons) CEng MIET MInstMC

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