Quartus Designs away state machines

I can see that some counters are undefined when they reach their maximum value.For example, in the below process, clkcount is not defined when it reaches count 2

--- Quote Start ---

process(clk)

begin

if(clk'event and clk ='1') then

if(clkcount = 2) then --reset to 28

state2clk <= '1';

else

clkcount <= clkcount + 1;

state2clk <= '0';

end if;

end if;

end process;

--- Quote End ---

similarly in the following process, state2clkcount is not defined at count 6

--- Quote Start ---

process(state2clk)

begin

if(state2clk'event and state2clk ='1') then

if(state2clkcount = 6) then

onesclk <= '1';

else

state2clkcount <= state2clkcount + 1;

onesclk <= '0';

end if;

end if;

end process;

--- Quote End ---

Moreover, the design is using multiple clks(can be unsafe from fpga perspective as opposed to ASIC). You should keep number of clks to a minimum and possibly one system clk will do by using enable signal to control rates.

You can also neatly divide all your clks in one process instead of a mixture of processes and lpm counter instantiations:

The following single process cascades as many counters as you want, count1 is enabled always, count2 is enabled only when count1 reaches maximum

and so on. They are clked by one system clk.

--- Quote Start ---

-- cascade as many counters as you want

process(clk)

begin

if(clk'event and clk ='1') then

.....if(count1 /= 2) then

..........count1 <= count1 + 1;

......else

..........count1 <= 0;

..........if(count2 /= 6)then

...............count2 <= count2 + 1;

..........else

...............count2 <= 0;

...............if(count3 /= 11)then

....................count3 <= count3 + 1;

...............else

....................count3 <= 0;

....................if(count4 /= 63)then

.........................count4 <= count4 + 1;

....................else

.........................count4 <= 0;

.........................if(count5 .....etc)

.............................etc

.........................end if;

....................end if;

................end if;

............end if;

......end if;

end if;

end process;

--- Quote End ---

Finally, don't forget to add reset to all counting.