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Honored Contributor
Honored ContributorQuartus complaint: My LOOP is too big? But the code is from the book, what's wrong?
Hello friends. I'm trying to make addition and subtraction of floating point. My guide is a book "Computer Arithmetic and Verilog HDL Fundamentals" by Cavanagh. Inside the module he use a code for al...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- I'd advise forgetting about floating point. FPGAs aren't designed for it. Sure, Altera provides floating point IP but you end up needing huge amounts of FPGA resources to use it unless you really know what you are doing. As others have said, you need to be thinking of designing hardware, not writing code. First analyze your problem. --- Quote End --- I think in this case is mandatory to use floating point, I need iterative divisions, divisions will bring up fractional numbers of different sizes, example. 2.9 - 2.1899, it is necessary to align exponents before make any operations, thus is necessary exponents to vary according to the input size difference, and this is exactly what floating point is about.
