Quartus complaint: My LOOP is too big? But the code is from the book, what's wrong?

I'd advise forgetting about floating point. FPGAs aren't designed for it. Sure, Altera provides floating point IP but you end up needing huge amounts of FPGA resources to use it unless you really know what you are doing. As others have said, you need to be thinking of designing hardware, not writing code. First analyze your problem. What are the min/max values of the inputs, outputs, and intermediate results? What precision do you need to keep in order to obtain sufficiently accurate results? What accuracy is required? How many bits are needed to represent these in binary? Then you come up with how many bits are before and after the decimal point. Prescale any inputs and intermediate constants so that no exponents are needed.

Only after all this (see a numerical methods or scientific programming book for details) will you know your fixed point format. Then do your calculations on fixed point integers. Draw out on paper where you need adders, multipliers. Learn about pipeline computing. Research parallel processing and determine if your calculation can be done in parallel. Is this a vector algorithm? If so FPGAs are particularly good at this.

Unfortunately, in spite of the marketing hype, you can't just take arbitrary algorithms and expect good results in an FPGA without learning the underlying techniques. I personally know of the existence of some of them but haven't actually implemented more than a few of these techniques.