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Altera_Forum
Honored Contributor
Honored ContributorQsys
As you find workarounds to Qsys issues please add them to the list found here: http://www.alterawiki.com/wiki/new_qsys_issues You'll save others some time and your input will be monitored by A...
Altera_ForumHonored Contributor
Honored ContributorYou'll want to look at the AXI bridge interfaces, the multi-port SDRAM controller AXI/Avalon interfaces do not have BFMs hooked up yet. The AXI bridge interfaces are the ones that support 32/64/128 bit data widths into the FPGA fabric.
