Forum Discussion
Altera_Forum
Honored Contributor
10 years agoI've not installed Quartus 16. However, I'd be amazed if they've changed any part of the SPI core when moving to it.
If using the core as a master - to connect to slaves external to the FPGA - then yes. You are going to need to export the SPI signals (SCLK, SS_N, MISO & MOSI) and assign them to pins in the pin planner. Chapter 9 of the "embedded peripherals ip user guide (https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/ug/ug_embedded_ip.pdf)" covers the core, and how to configure it, in detail. Cheers, Alex