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Altera_Forum's avatar
Altera_Forum
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12 years ago

QSYS output (synthesis) directory workaround?

Hello All, We recently started upgrading from SOPC builder to QSYS. There is one(...) big annoying difference between the two systems: When generating a system QSYS copies ALL files into a synt...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Hi Jo,

You can stop Quartus from copying files by using a .qip file. For example, here are the last lines of a Tcl generate procedure:

--- Quote Start ---

# Add the files to the project (Quartus copies the files)

#

# Generated instance

add_fileset_file "$entity.vhd" VHDL PATH "$file"

#

# QIP File

set vhdl $::env(VHDL)

add_fileset_file avs_ltc1867.qip OTHER PATH $vhdl/lib/ltc1867/scripts/avs_ltc1867.qip

--- Quote End ---

I know this might not be enough information to understand what do to, so I'll upload a zip file with the component source. The component won't work for you, since its missing other dependent source (I just zipped a folder in my CVS tree), but at least you'll be able to see the _hw.tcl script and the associated support files.

If you get stuck, ask questions.

Cheers,

Dave