Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Qsys new component - file path keeps changing

Hello,

i am working on my first Qsys project and it is running smooth with all built in components and one custom unit i connected in my .bdf file.

However, i was trying to a add the I2C unit from Altera wiki by the following steps:

  1. New component (in Qsys)

  2. add the top module to files (i2c_opencores.v)

  3. Analyze file and connect all signal to the avalon counterpart and assign everything in interfaces and edit some names

  4. no errors or warnings appear and i save

  5. adding to system content is fine too

  6. THEN: when i edit the file again or just generate and compile in quartus i get the errors

edit again error: Error: add_fileset_file: No such file .../VHDL/i2c_opencores/vhdl/i2c_opencores/i2c_opencores.v

the path is doubled??

same during compilation:

Error (12252): ...: add_fileset_file: No such file .../TDC_FPGA/VHDL/i2c_opencores/VHDL/i2c_opencores/i2c_opencores.v

no matter how often i specify the correct path it always returns to the wrong path!

Any ideas someone?

EDIT: i dont get this pathchange if i dont edit any names and leave everythin "as is".

EDIT2: however it also happens if i add multiple files!

17 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    --- Quote Start ---

    given the statement by one of their gurus that component editor was meant to just get the user started

    --- Quote End ---

    I agree with your customer's guru; if you're going to spend any amount of time creating/editing components, just do it via the TCL files. The GUI editor doesn't really bring much to the table and leaves much to be desired.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    --- Quote Start ---

    I agree with your customer's guru; if you're going to spend any amount of time creating/editing components, just do it via the TCL files. The GUI editor doesn't really bring much to the table and leaves much to be desired.

    --- Quote End ---

    Sorry for not being clear. It was an Altera guru that made the comment about the component editor. I share your sentiments about the GUI. Unfortunately we couldn't convince Altera that there is a bigger issue here.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    --- Quote Start ---

    Hello,

    i am working on my first Qsys project and it is running smooth with all built in components and one custom unit i connected in my .bdf file.

    However, i was trying to a add the I2C unit from Altera wiki by the following steps:

    1. New component (in Qsys)

    2. add the top module to files (i2c_opencores.v)

    3. Analyze file and connect all signal to the avalon counterpart and assign everything in interfaces and edit some names

    4. no errors or warnings appear and i save

    5. adding to system content is fine too

    6. THEN: when i edit the file again or just generate and compile in quartus i get the errors

    edit again error: Error: add_fileset_file: No such file .../VHDL/i2c_opencores/vhdl/i2c_opencores/i2c_opencores.v

    the path is doubled??

    same during compilation:

    Error (12252): ...: add_fileset_file: No such file .../TDC_FPGA/VHDL/i2c_opencores/VHDL/i2c_opencores/i2c_opencores.v

    no matter how often i specify the correct path it always returns to the wrong path!

    Any ideas someone?

    EDIT: i dont get this pathchange if i dont edit any names and leave everythin "as is".

    EDIT2: however it also happens if i add multiple files!

    --- Quote End ---

    When using I2C Opencores via QSYS and then compiling in Quartus II v.13.0 I get "Warning (12251): I2c_opencores_0: i2c_opencores is not in the library" which results in Errors.

    In QSYS Generate went OK. What library is Quartus talking about?

    Is it the same thing You were asking about? What is the way out?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    A reply to myself: put all I2C Opencores Verilog files into the same directory where the Top project is located.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    I'm just sending this quickly. Hopefully it helps.

    Often when you add a component in Qsys, you have to add a .qip file that is generated, not the top level hdl file. In the QIP file is a reference to all the hdl, sdc, tcl, etc. files. Sometimes you have to also make changes to sdc files (for example in the case of the ethernet MAC for clock frequencies) - this annoying problem is helped by copying the sdc into your own source directory and adding it to the project otherwise it will be overwritten everytime you run Qsys.

    A third party design or custom design needs the _hw.tcl file (can be generated by the component editor but only do this once at the start, then edit it manually) and you have to put the file set in the Altera/release/ip directory. Qsys will scan it and make it available as a component and its source files will be included in the system QIP file.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    I stopped using the component editor for these reasons. Its actually easier to work with hw.tcl files - learning curve is just a couple of hours. Also once you make one its easy to modify and make others.