Qsys new component - file path keeps changing

I'm just sending this quickly. Hopefully it helps.

Often when you add a component in Qsys, you have to add a .qip file that is generated, not the top level hdl file. In the QIP file is a reference to all the hdl, sdc, tcl, etc. files. Sometimes you have to also make changes to sdc files (for example in the case of the ethernet MAC for clock frequencies) - this annoying problem is helped by copying the sdc into your own source directory and adding it to the project otherwise it will be overwritten everytime you run Qsys.

A third party design or custom design needs the _hw.tcl file (can be generated by the component editor but only do this once at the start, then edit it manually) and you have to put the file set in the Altera/release/ip directory. Qsys will scan it and make it available as a component and its source files will be included in the system QIP file.