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bigcheesefuzz's avatar
bigcheesefuzz
Icon for New Contributor rankNew Contributor
7 years ago

QSYS export a signal and use as a connection

Hello, I'm trying to debug an FPGA / NIOS design at the moment for an intermittent bug, I'd like to bring a number of internal NIOS signals to pins on my FPGA. However when I set a signal (e.g. ...
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
7 years ago

For other signals, use a pipeline bridge to connect signals internally to the system as well as be able to export them (connect them to slave side of bridge and export from the master side).