Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorQsys and basic signals
Hello All. Have problem with simple project with qsys. I am use onchip ram, and want write to address 0x000_000 2 bytes. I am add in qsys altera master template, all connect and 0 errors,...
Altera_ForumHonored Contributor
Honored ContributorWhat do you want to write to your on-chip RAM with? One option is to use a Jtag->Avalon Master Bridge and then use something like System Console to write to the onchip RAM.
If you want to do it in VHDL, then you can double-click the Slave port on the RAM and export the signals. Then your top level file will include the Qsys component (see Generate->Show Instantiation Template...) for the component signals. This should show you your clock and reset signals, and the avalon_mm addr, data, be, read, write, and q signals.
