QSys - Exporting an AXI4-Lite interface

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It's reasonably trivial to export an AXI3 or AXI4 interface from QSys to external HDL by instantiating an AXI Bridge. However AXI4-Lite is not available as a protocol option on this component.

It is available (and exportable) on an AXI Slave Agent (or AXI Master Agent) component but I see no way to use these components without building your own Qsys memory mapped interconnect since they expose the Qsys packet interface as Avalon-ST.

Is there an obvious way I'm missing to expose an AXI4 Lite interface such that I can connect an AXi4-Lite slave in external HDL?

(Quartus 15.1/Arria10)

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Which components are you talking about exactly? If you make a custom component, you can export any bridge that you want. Otherwise you could just export AXI4 and tie the lines to defaults, setting burst to 0.