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BrianM's avatar
BrianM
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

qmegawiz generated SRAM simulation model broken

I've tried 21.1 and 21.1.1, the results are the same. Here is the pertinent data from the generated variation file: module psu_mgmt_sram ( clock, data, rdaddress, wraddress, wren, q); input c...
ShengN_altera's avatar
ShengN_altera
Icon for Super Contributor rankSuper Contributor
3 years ago

Hi,


You probably wouldn't find the signal sub_wire0 in sim tab because the signal sub_wire0 is just a wire.

You'll only see it after right-click -> Add to -> Wave -> All items in region and below


Thanks,

Best regards,

Sheng

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.


  • BrianM's avatar
    BrianM
    Icon for Occasional Contributor rankOccasional Contributor
    3 years ago

    I used menu item Add -> Wave -> All Items in region and below and sub_wire0 is not present.

    There is clearly some issue with generation of the simulation model, but I can't figure out what it is.

    I've tried forcing different kind of SRAM (MRAM, M10K, etc). I've tried changing the bus size.

    I've even copied working ram .v and .qip files to these file names, leaving them untouched and it doesn't generate working simulation models.

    In the waveform, I can see the write strobe, address and data attempting writes, but the readback always returns as 32'hzzzzzzzz.

    I'm not sure what is going wrong.