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Altera_Forum
Honored Contributor
9 years agoQIP File doesn't include the submodules after adding in a certain conneciton
Hello, I'm currently facing an issue with Quartus II Lite. I have a DE0-Nano-SoC board from terasic and I'm customizing one of the sample designs that they provide. I am struggling with an issu...
Altera_Forum
Honored Contributor
9 years agoSo you're just exporting these interfaces on the System Contents tab in Qsys? Under the Generate menu, does the instantiation template show the individual signals of the exported interfaces?