Q about Incremental Compilation + Global Routing Resources

Hello all,

Due to an unexpected speed increase caused by LogicLock division in a design, I'd like to use incremental compilation to see firsthand the pros and cons of a bottom-up, hierarchical procedure in comparison to a completely flat fitting flow. In particular, I'd like to use the procedure described in the Quartus II handbook, "Designing in a Team-Based Environment" (2-38). Using Post-Fit Netlists may save me overall compilation time, but due to my inexperience I am unsure of how to handle global routing resources.

Provided I turn the fitter setting auto global clock to "Off" when building the lower level blocks, I am able to do something like this: Implementing a top level design that instantiates empty modules that are connected together, I am able to fully compile the design in Quartus. These empty modules are assigned fixed+locked LogicLock regions and are also design partitions (with Netlist Type "Empty"). After a successful compilation in Quartus, I generated scripts for lower level modules by selecting Project -> Generate Design Partition Scripts. After that, I can select Tools -> Tcl scripts... to load the tcl script for one of these blocks. After compiling for the block, I select Project -> Export Design Partition in order to get the qxp file. After doing this for each block, I import the partitions at the top level, changing the netlist type from "Empty" to "Post-fit".

Here's where it gets a bit hazy for me. If I wanted these lower level partitions to use global clock resources, I don't know how to do this manually or automatically. If I don't turn auto global clock to "Off" when fitting the blocks, It'll fail when using the Post-Fit netlists due to the subblocks trying to use the same CLKCTRL blocks ("Could not place global clock driver", "Could not merge with previously placed clock drivers at location CLKCTRL_G0", etc.). This was expected. The question is, how do I preemptively pass down the information to the individual blocks that a signal should be a global clock during the initial top-level compilation with empty partitions (and what specific resources that it should use)? The Quartus II Handbook mentions to set global signal allocation constraints, but I'm not sure what that means. I tried using the assignment editor to set the input clocks to the global signal/global clock options, but I get warnings that the global signal option is ignored because the 'source does not feed directly to destination'.

Thanks.