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Altera_Forum
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17 years ago

Pull-ups/Pull-Down/Slew-Rate I/O pins definitions

Hello, Scoured the Quartus/Cyclone-III docs for methods of defining Pull-ups/Pull-Down/Slew-Rate for I/O pins, but to no avail. 1. I understand that most of the device's I/O have interna...
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Altera_Forum
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17 years ago

The said items are no available FPGA resources (I think with no family) but external termination elements to be considered in output load calculation and signal integrity checks.