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Altera_Forum
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14 years ago

Proporgation delays using Quartus 2

I am using Quartus 2 for targeting a MAX7000S CPLD device; however I do not know how to view prorogation delays. I have a simple example, if a use a 2 input AND gate and look at the Timing output wav...
Altera_Forum's avatar
Altera_Forum
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14 years ago

It depends on how what you describe is synthesized. If your two gates can be combined in a single look-up table element inside the CPLD, then the delay will be exactly the same. Check in the report if the number of used resources is the same, or use the technology mapper to find out how Quartus converted your design to CPLD blocks.