Forum Discussion
EBERLAZARE_I_Intel
Regular Contributor
4 years agoHi,
You can refer and check the below designs:
https://people.ece.cornell.edu/land/courses/ece5760/DE2/tut_DE2_sdram_verilog.pdf
https://fpgacloud.intel.com/devstore/platform/16.0.0/Standard/sdram-nios-test-max10-de10-lite/