program for a calculator

Hello everyone, someone who can guide me to make the following code in vhdl; I need to do a 4-bit calculator (addition, subtraction, division and multiplication operations), the result should be seen in a 7-segment display, simulate in modelsim. Thank you very much.

This is my code, but I still need to generate the output on the displays.
Someone who can support me.
Thank you very much.

Library ieee;
Use ieee.std_logic_1164.all;
Use ieee.std_logic_unsigned.all;
Use ieee.numeric_std.all;

Entity calc is
generic(constant n: natural := 1 );

Port (
a, b: in std_logic_vector (7 downto 0);
operacion: in std_logic_vector (4 downto 0);
resultado: out std_logic_vector (7 downto 0);
c: out std_logic
);

End calc;

Architecture arq of calc is

Signal tres: std_logic_vector(7 downto 0);
Signal tmp: std_logic_vector(8 downto 0);

begin
process (a,b,operacion)

begin
case(operacion) is

when "00000" => tres <= a+b;-- suma
when "00001"=> tres <= a-b; -- resta
when "00011" => tres <= std_logic_vector(to_unsigned(to_integer(unsigned(a)) * to_integer (unsigned(b)), 8));--multiplicación
when "00010" => tres <= std_logic_vector(to_unsigned(to_integer(unsigned(a)) / to_integer (unsigned(b)), 8));--división
when others => tres <= a+b;

end case;

end process;

resultado <= tres;
tmp<=('0' & a) + ('0' & b);
c <= tmp(8);

end arq;