Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

problems with real data type conversion to std_logic_vector

Hi, I'm doing an discrete PID controller, based on FPGA's, but I wanna do it using floating point maths, the first block I was doing was an integrator, but I got an issue, the generic parameters of ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

--- Quote Start ---

the IEEE floating point package that became a standard with VHDL 2008 will have the conversion function you need.

--- Quote End ---

It looks like the OP intends unsigned integer arithmetic, the real to unsigned conversion can be done without additional libraries.