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Altera_Forum's avatar
Altera_Forum
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15 years ago

Problems with Qsys Avalon UART Rx Interrupt

Hey Guys, I have problems with the Avalon UART Rx Interrupt Generation.

I'm sending several ascii-signs to my UART but there is absolutely no reaction. Neither in simulation nor in synthesis. The Interrupt is definitely not generated and the signs are not adopted. If i force the rxd-pin in ModelSim, there is no effect...

The transmit interrupt in contrast works absolutely fine. No problems with it.

By the way I have enabled all interrupts, not just the Rx and Tx and there is also no "Error Interrupt".

Is there any workaround I did not found yet?

Thanks a lot.

10 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Actually I'm using my own 32-Bit Softcore. But I monitor the Avalon Irq-Signal on an external Pin from my FPGA. And when I'm transmitting a character there is an IRQ, but NOT at an Rx. And yes, the UART signal arrives at the FPGA ;)

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    I don't know the details, but interrupt won't work if there will be no avalon slave register assigned to it for interrupt clearing. The interrupt fires and then YOU need to clear the flag of it.

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Yeah, but the Interrupt does not fire at all. In simulation the IRQ Flag is also not being set if i stimulate/force the "rxd"-pin of the UART, and of cource the slave register (control, status, txdata, rxdata,...) are accessable and are being accessed by my core.

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Then create a SR if You've read the docu and You're sure that everything are within specs.

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Well, perhaps I'll do that because I can't see the causative error... :(

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Ok, I analyzed the UART Simulation System more deeper with the ModelSim Debug option and.. well, please correct me, but it seems that the rxd-pin path into the UART systems ends in the "Uart_rx_stimulus_source" and isn't assigned somewhere else.

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Hi, I have another question concernig the IRq acknowledgement of the UART Core.

    Fore examle if there is an Tx Interrupt, then the belonging bit in the status register is set and i have to read the status register. But how do I clear the IRQ or acknowledge it, better said, how do i reset the irq-bit?

    In the UART Core Spec. there is the annotation that "Writing zero to the status register clears DCTS, E, TOE, ROE, BRK, FE and PE bits".

    At the moment, if there is an Tx IRQ, my IRQ pins goes from Low to High, I read the status register, I set the status register tx-irq-bit to zero (of cource with no effect), and the IRQ Pin remains high and goes never again to Low Level.

    Thanks.
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    Hi Michi,

    Are you able to resolve your problem?

    I am facing the same problem. Would you please share the solution if any?

    Thanks,

    Krupesh
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    Hi,

    as I can remember I decided me to use a different IP because i was not able to fixed the mentioned problem...

    Sorry.

    Greetings

    Michael