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Altera_Forum's avatar
Altera_Forum
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15 years ago

Problems with "My first FPGA tutorial"

Hi,

I'm using quartus2 10.0sp1 web edition. Due to my inexperience, i'm trying to replicate "my first FPGA tutorial", but i have 2 problems:

  1. i don't find LPM_MuX (pag 28). Thi isn't present in megawizard, but is present in symbol...what's wrong?how can obtain the same mux displayed at page 31?

  2. i have some problems using pin planner...after "analysis and elaboration" without any error, if i click on pin planner i/o pins aren't displayed...why?

Thanks

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Hiya, I am quite new to FPGA's and VHDL aswell, and unfortunately don't have an answer to your question.

    My Quartus II 10.0 SP1 web edition doesn't have the lpm_mux in the the megawizard library either, by the looks of it there may be a library containing more megafunctions that needs to be downloaded and installed...

    One thing I will say that I have found from my own experience that it is better to create your designs using VHDL code rather than using the block diagram files..... some people may disagree but I found it best to use the megawizard to instantiate more complicated things such as PLLs etc, but I tended to have less problems and a better understanding of what I was doing when the majority of the design I was in VHDL that I had written rather than trying to use the schematic editor...

    Sorry if my post is not that helpful... but i thought i'd share my own experience...
  • Altera_Forum's avatar
    Altera_Forum
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    Hi,

    I'm having the same problem as sampei with the pin planner. After "analysis and elaboration" has been run without any error, clicking on pin planner opens the pin planner window but no I/O pins are displayed. Any ideas? Thanks.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    HI,

    I had the same problem with the tutorial.And the only solution for it is to create your own block by writing a simple VHDL code for mux and use it in the design.Remeber not to use the name lpm_mux else the complier will not accept it.Use any other name.

    It worked for me.