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Altera_Forum's avatar
Altera_Forum
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18 years ago

Problems with FSM's and Counters

I'm having some major problems with this VHDL code. It's supposed to simulate an intersection traffic lights but the behavior that the waveform exhibits doesn't make any sense for the simplest cases...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

>there are random blips

This seems nothing special, very common bahaviour with combinatinal logic - you have to make sure that all physical outs are synched.