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Altera_Forum
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11 years ago

Problems synthesizeing infered true dual ported RAM

Hello Everybody, I'm pretty new to the Altera World and just hit some problems while trying to synthesize an infering true dual ported RAM. I already found some code snips but I didn't find the 10...
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Altera_Forum
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11 years ago

It is strange that you didn't get an error the first time. It could be that Quartus managed to do an optimization or synthesize your code as a memory block before it cold realize that you had two processes writing to the same signal.

Did you have a look at Altera's recommended hdl coding styles (http://www.altera.com/literature/hb/qts/qts_qii51007.pdf) document? Example 13-25 on page 13-33 describe a dual port memory with byte enable signals.