Forum Discussion
Altera_Forum
Honored Contributor
8 years agoproblem with type matching
Hey guys! I'm having a problem with component instantiation. I keep on getting the an error in modelsim that my types dont match up: # ** Failure: (vsim-3807) Types do not match between compon...
Altera_Forum
Honored Contributor
8 years ago --- Quote Start --- I would say the same thing, using std_logic_vector instead of integer in your port list is a better practice. Of course you will probably have a few more cast operation but integer is not really HW friendly. --- Quote End --- This is only true if you really want to do netlist sims, or want to connect pins at the top level. Integer is perfectly hardware friendly for internal signals. I would always recommend an appropriate type for readable code over std_logic_vector. Even unsigned/signed can be used at the top level. Make your life easier with readable code.